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PIC16F87XA

DS39582B-page 182

2003 Microchip Technology Inc.

FIGURE 17-4:

EXTERNAL CLOCK TIMING

OSC1

CLKO

TABLE 17-3:

EXTERNAL CLOCK TIMING REQUIREMENTS

Param

No.

Symbol

Characteristic

Min

Typ

Max

Units

Conditions

FOSC

External CLKI Frequency

(Note 1)

—

MHz

XT and RC Osc mode

—

MHz

HS Osc mode

—

kHz

LP Osc mode

Oscillator Frequency

(Note 1)

—

MHz

RC Osc mode

0.1

—

MHz

XT Osc mode

—

200

MHz

kHz

HS Osc mode

LP Osc mode

1TOSC

External CLKI Period

(Note 1)

1000

—

XT and RC Osc mode

—

HS Osc mode

5—

—

sLP Osc mode

Oscillator Period

(Note 1)

250

—

RC Osc mode

250

—

XT Osc mode

100

—

250

HS Osc mode

—

250

HS Osc mode

31.25

—

sLP Osc mode

2TCY

Instruction Cycle Time

(Note 1)

200

TCY

TCY = 4/FOSC

3TOSL,

TOSH

External Clock in (OSC1) High or

Low Time

100

—

XT oscillator

2.5

—

LP oscillator

—

HS oscillator

4TOSR,

TOSF

External Clock in (OSC1) Rise or

Fall Time

—

XT oscillator

—

LP oscillator

—

HS oscillator

Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

Note 1:

Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are

based on characterization data for that particular oscillator type, under standard operating conditions, with

the device executing code. Exceeding these specified limits may result in an unstable oscillator operation

and/or higher than expected current consumption. All devices are tested to operate at “min.” values with an

external clock applied to the OSC1/CLKI pin. When an external clock input is used, the “max.” cycle time

limit is “DC” (no clock) for all devices.

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